1. Field of the Invention
The present invention relates to lithography technology. More particularly, the present invention relates to a process for forming an anti-reflection coating (ARC), a method for improving accuracy of overlay measurement based on the process, and a method for implementing alignment in lithography that includes the same process.
2. Description of the Related Art
In any semiconductor process, the alignment accuracy between the exposure system and wafers is a very important factor for correct connection between layers of different levels. Therefore, overlay marks are usually formed on a wafer, so that after a lithography process, overlay errors can be derived by measuring the relative displacement between the patterned photoresist layer and the overlay marks. The exposure system can be calibrated according to the overlay errors, so as to improve the alignment accuracy of subsequent wafers exposed with the same exposure system.
Moreover, to reduce the reflecting light from the surface of the layer to be patterned and thereby improve the profile of the photoresist pattern, a bottom anti-reflection coating (BARC) is usually formed on the layer before the photoresist material is applied. In the prior art, the BARC is formed through a single curing step.
FIG. 1A is a photograph of a substrate having an overlay mark, a BARC formed through a single curing step and a patterned photoresist layer thereon, and FIG. 1B illustrates a simplified cross-sectional view of the structure of FIG. 1A along line I-I′. The overlay mark 110 on the substrate 100 is constituted of four trenches 110a arranged in an unclosed square and a thin polysilicon layer 120 as a reflective layer that is formed conformally on the substrate 100 before the BARC 130. The portion of the patterned photoresist layer formed over the overlay mark 110 includes four rectangular patterns 140 arranged in a smaller unclosed square.
However, in the prior art, the portions of the BARC 130 in the trenches 110a is easily separated from the other portions outside the trenches 110a because of rapid curing in the single curing step, so that a hole 132 is formed around each trench 110a with a boundary 130a. The boundaries 130a will interfere with measurement of the overlay errors between the overlay mark 110 and the photoresist patterns 140, so that the overlay errors cannot be measured accurately. Since parameters of a lithography process cannot be adjusted accurately based on inaccurate overlay measurement, the alignment accuracy of subsequent wafers subject to the same lithography process cannot be improved effectively.